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SEALSQ has announced VaultIC409, a secure element built on its QS7001 platform and designed to support post-quantum algorithms alongside RSA and ECC. The company plans a TLS 1.3 demonstration in November 2026 and expects engineering samples in Q2 2027; certification and product performance details remain pending.
SEALSQ has announced VaultIC409, a secure element designed to support post-quantum cryptography in connected devices while allowing customers to retain their existing hardware security architecture. Built on the company’s QS7001 platform, it is designed to support ML-KEM and ML-DSA as well as RSA and ECC, and is intended for markets including industrial, smart energy and Internet of Things devices.
SEALSQ says VaultIC409 combines a hardware Root of Trust, cryptographic agility, dedicated cryptographic acceleration and a Serial Peripheral Interface, or SPI, connection. The company says its design supports ML-KEM, specified in FIPS 203, for key establishment and ML-DSA, specified in FIPS 204, for digital signatures. It is also designed to support established RSA and ECC algorithms, which can be used in systems that need to maintain classical cryptography alongside newer methods.
The company says the secure element’s accelerator handles computationally intensive cryptographic operations, while sensitive keys and other assets remain in a protected hardware environment. SEALSQ also describes SPI connectivity as a way to handle the larger data exchanges associated with post-quantum keys, signatures and certificates. These are design descriptions from the company; the announcement does not provide independent performance results, power-consumption figures or detailed capacity measurements.
SEALSQ plans to show a TLS 1.3 application using VaultIC409 at Electronica, scheduled for November 10–13, 2026. The company expects engineering samples in Q2 2027 for customer and partner evaluation. The underlying QS7001 platform is undergoing Common Criteria EAL5+ certification, according to SEALSQ; the announcement does not say that certification has been completed.
A Retrofit Path for Device Security
The announcement addresses a practical challenge for device makers: preparing products for post-quantum cryptography can require larger keys and signatures, additional data transfer and more demanding computation. SEALSQ’s stated aim is to provide those capabilities through a secure element that fits customers’ existing hardware security foundation, potentially reducing the need for a broader redesign. Whether it does so for a particular product will depend on compatibility, integration work and performance testing.
Support for both post-quantum and conventional algorithms is relevant because manufacturers may need to operate mixed systems while updating products and infrastructure. A hardware Root of Trust can serve as a protected basis for device identity and key handling, while acceleration and SPI are intended to accommodate cryptographic processing and data exchange. The announcement signals a product-development effort, not proof that connected devices are already protected against future quantum attacks.
Timing also matters for product planners: engineering samples are not expected until Q2 2027. Customers will need to evaluate the component and its software, certification status, integration requirements and real-world behavior before deciding whether it meets their security and product schedules.
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VaultIC and the PQC Shift
VaultIC409 extends SEALSQ’s existing VaultIC secure-element portfolio. The company says the new part targets the same established markets as VaultIC408 and is intended to give existing customers a route to post-quantum support without replacing their hardware security architecture. The announcement does not specify which existing VaultIC designs or customer products are directly compatible.
Post-quantum cryptography refers to cryptographic methods designed to resist attacks using quantum computers. SEALSQ points to ML-KEM and ML-DSA, standards published as FIPS 203 and FIPS 204, respectively, as algorithms VaultIC409 is designed to support. Its continued support for RSA and ECC could allow classical and post-quantum methods to be used in hybrid arrangements, although the company has not detailed particular configurations or deployment guidance.
SEALSQ describes approaching EU and U.S. security requirements as a reason manufacturers should prepare. Its announcement does not name specific rules, deadlines or compliance obligations, so the product’s relationship to any particular regulation remains unspecified.
“VaultIC409 gives our customers a direct path to post-quantum security on a certified platform they already know.”
— Carlos Moreira, SEALSQ founder and CEO
hardware security module with post-quantum support
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Certification and Performance Still Pending
Several product details remain unconfirmed or absent from the announcement. SEALSQ says the QS7001 platform is undergoing Common Criteria EAL5+ certification, but gives no completion date or certification result. It also has not published independent benchmarks, supported key and signature sizes, power consumption, pricing, production availability or a detailed compatibility list for existing customer designs.
The planned November demonstration is a future event, and engineering samples are not expected until Q2 2027. It is not yet clear when mass production or commercial availability will begin, which customers will evaluate the samples, or how the device will perform in specific applications. The announcement’s references to EU and U.S. requirements do not identify particular rules or establish that VaultIC409 meets them.
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Demo First, Samples in 2027
SEALSQ says it will demonstrate VaultIC409 through a TLS 1.3 application at Electronica, at booth Hall C6 – 670, from November 10 to 13, 2026. That demonstration is the next public opportunity for the company to show how it intends to use the secure element for protected communications.
The next stated product milestone is the planned release of engineering samples in Q2 2027, for evaluation and integration work with customers and partners. Further information on certification progress, technical specifications, production timing and customer testing will be needed to assess how the announced design performs in deployed products.
cryptographic acceleration hardware
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Key Questions
What is SEALSQ’s VaultIC409?
It is a secure element built on SEALSQ’s QS7001 platform and designed to provide hardware-backed security and support post-quantum and conventional cryptographic algorithms in connected devices.
Which cryptographic standards is VaultIC409 designed to support?
SEALSQ says it supports ML-KEM under FIPS 203 and ML-DSA under FIPS 204, alongside RSA and ECC. The announcement does not give detailed implementation or performance specifications.
When will VaultIC409 be available?
SEALSQ expects to make engineering samples available in Q2 2027. The company has not announced a mass-production or general commercial availability date.
Has VaultIC409 completed EAL5+ certification?
No completion is reported. SEALSQ says the underlying QS7001 platform is undergoing Common Criteria EAL5+ certification.
Will customers need to redesign their hardware?
SEALSQ says VaultIC409 is intended to offer existing customers a path to post-quantum security without redesigning their hardware security foundation. Specific compatibility and integration requirements have not been published.
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